High-speed devices begin the enumeration process identical to full-speed devices. High-speed devices announce to the Host that they are ready to be enumerated by asserting a 5 V signal on D+ through the use of a 1.5 kΩ pull-up resistor. During the 20 ms enumeration RESET signal sent by the Host, the Device executes the High-Speed negotiation process. Upon completing this negotiation the Device, Host, and Hub port connecting the Device will operate in High-Speed mode.
High-speed USB was designed to coexist with full-speed USB. The designers speculated many systems would have a Host that could simultaneously offer support for full and high-speed devices. To achieve compatibility, eight high-speed microframes are completed within 1 ms.
HIGH SPEED Frame size: 125 μs
| Supported Transfer Types |
Maximum Size of Transfer |
Transfers per frame |
Maximum Theoretical Throughput |
| Control | 64 bytes | 1 | 64 kByte/s |
| Interrupt | 1024 bytes | up to 3 | 24 MByte/s |
| Bulk | 512 bytes | up to 13 | 53 MByte/s |
| Isochronous | 1024 bytes | up to 3 | 24 MByte/s |
| HS USB Bus States |
Bus Levels |
|---|---|
| Differential "1" | D+ high , D- low |
| Differential "0" | D+ low , D- high |
| Single Ended 0 (SE0) | D+ low , D- low |
| Single Ended 1 (SE1) | D+ high, D- high Invalid condition! |
| Data J state | Differential "1" |
| Data K State | Differential "0" |
| Idle | Data J |
| Resume | Data K |
| Start of Packet (SOP) | switches from Idle to Data K |
| End of Packet (EOP) | SE0 for 2 bits, followed by Data J for 1 bit |
| Disconnect | SE0 >= 2 μs |
| Connect | Idle for 2.5 μs |
| Reset | SE0 >= 2 μs |